ISSCC: Samsung to Present Details on 28nm SoC and New Architecture
By Rob Scott
November 29, 2012
November 29, 2012
- “Samsung will describe the first mobile applications processor to use ARM’s big.little concept at the International Solid-State Circuits Conference in February,” reports EE Times.
- The company is scheduled to present details on the 28-nanometer system-on-a-chip incorporating ARM’s big.little architecture during the semiconductor industry’s premier conference.
- “We expect the Samsung part is the first big.little processor,” suggests senior analyst Kevin Krewell of The Linley Group. “The A7 cores should be capable of handling most [smartphone] tasks, with the A15 cores only required for maximum performance needs, like video games.”
- “Samsung will detail a 28-nm SoC with two quad-core clusters,” explains the article. “One cluster runs at 1. 8 GHz, has a 2 MByte L2 cache and is geared for high performance apps; the other runs at 1.2 GHz and is tuned for energy efficiency.”
- “The chip and ones like it from Qualcomm, Nvidia and others will roll out in 2013, competing for sockets in tablets with Intel’s 22-nm Haswell, which will not be described at ISSCC.”
- Also expected to be described at the conference: Nvidia’s 20 Gbit/s serial die-to-die link made in 28-nm CMOS (which may be part of Nvidia’s Project Denver and its family of processors merging ARM and graphics cores), a new version of the Godson 3B processor made using a 32-nm process from China’s Institute of Computing Technology, and a 200-MHz video decoder from Texas Instruments and MIT implementing the High-Efficiency Video Coding draft standard.
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